This application claims the priority benefit of Taiwan application serial no. 89107354, filed Apr. 19, 2000.
1. Field of Invention
The present invention relates to a device formed on a silicon-on insulator (SOI). More particularly, the present invention relates to a MOSFET formed on a SOI with a body contact.
2. Description of Related Art
SOI structure can provide better isolation structure than that of conventional device such that some effects such as latch-up or substrate coupling effect can be eliminated or reduced. SOI structure also can reduce parasitic capacitance due to junction capacitance and be applicable of small-area high-integration and high-speed devices. Based on the advantages as mentioned above, SOI becomes an important semiconductor technology currently and it has been developed various MOS transistor formed on SOI wherein full-depleted MOS transistor is the most popular device.
Full-depleted MOS transistor has high current driven ability and is capable of reducing channel effect and hot carrier degradation. However, floating substrate of MOS transistor formed on SOI causes some problems such as kink effect, abnormal sub-threshold slope, low breakdown voltage, or latch effect due to lateral parasitic BJT.
The invention provides a SOI structure having a body contact, thereby reducing body effect and enhancing performance of circuits.
As embodied and broadly described herein, the invention provides a device structure formed on a SOI substrate having a body contact. The SOI substrate has an insulating layer thereon and a silicon layer is disposed on the insulating layer. A gate is disposed on the silicon layer. A source region and a drain region are respectively disposed within the silicon layer beside the gate. A body contact is provided at an interface between the insulating layer and the silicon layer wherein the body contact is preferably located between the source region and the gate. The body contact, disposed between the source region and the gate, can reduce kink effect and body effect, thereby enhancing the performance of device formed on SOI.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.